[SystemSafety] multi-core validation for aerospace

[Olwen Morgan]

Interesting.

A few weeks back I tested a few C functions that performed, without 
using conditional constructs, some small tasks that usually are 
accomplished with conditionals. By way of comparative performance tests, 
I wrapped the functions in a loop that performed them 5,000,000,000 
times and timed them using the facilities of the <time.h> library.

There were interesting variations in successive timings for the same 
function, which I attributed, possibly wrongly, to having aynschronous 
processes swapping among the cores of an Intel iCore7 processor. This 
made me wonder about the extent to which asynchronous processing in 
multi-core CPUs may introduce unhelpful temporal non-determinism into 
otherwise deterministic processes.

Apart from wondering, I lack the specialist expertise to prognosticate 
further.


Olwen


On 13/11/2018 16:10, Chris Hills wrote:
>
> Hi All
>
> I have a customer who is looking at a project that will be multi-core 
> processors for aviation use.  They are going to have to validate the 
> system and its software. They are trying to work out how they would 
> gather sufficient evidence for this.
>
> They are looking at different cores on the same device.  Different 
> cores could potentially run different functions each, or could use 
> something across all the cores. Design is up in the air just now, so 
> they are looking for a general certification approach and what they 
>  would need to achieve this and  any ways they  could do it using more 
> automated methods where possible.
>
> Does anyone have any pointers for them to get started?
>
> This is a UK based project.
>
> Regards
>   Chris
>
> Phaedrus Systems Ltd
>
> 96 Brambling B77 5PG
>
> FREEphone 0808 1800 358    International +44 1827 259 546
> Vat GB860621831  Co Reg #04120771
> Http://www.phaedsys.com <http://www.phaedsys.com/>chills at phaedsys.com 
> <mailto:chills at phaedsys.com>
>
>
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